/* RESET AND INTERRUPT VECTORS
Modified-version of COSMIC-France's vector.c
(c) M. Lutfi Shahab
First creation : 8-Jan-1995
Modifications :
- Bugs found in Whitesmiths's vector.c (vector 9 contains Division
by Zero).
- RESET: Whitesmith always defined zk and sk by zero, but in this
file, user can modified it.
- exception handler now can only be a near address (appropiate use
for EVB under MCX16 kernel operation).
*/
#define _WSC_
#include "mcx16.h"
extern SYSTABLE SysTable;
extern @port void _stext(void); /* startup routine */
extern @port void SCITrmIsr(void); /* SCI transmit interrupt handler */
extern @port void SCIRcvIsr(void); /* SCI receive interrupt handler */
extern @port void _BerrIsr(void);
extern @port void DivZero(void);
extern @port void IllegalOpcode(void);
extern @port void _default(void);
static @port void _dummit(void);
const struct reset {
@far @port void (*rst)(void); /* reset + code extension */
unsigned int isp; /* initial stack pointer */
unsigned int dpp; /* direct page pointer */
@port void (*vector[58])(void); /* interrupt vectors */
} _reset = {
/*0000:*/ /* vector 0: (ixksk) = $0110
bank 0, stack at $1xxxx
start address :
[15:12] = reserved
[11:8] = initial ZK
[7:4] = initial SK
[3:0] = initial PK
*/
/*0002: */ _stext, /* vector 1, initial PC */
/*0004: */ 0x002E, /* vector 2, Stack Pointer, [15:0] = initial SP */
/*0006:*/ 0x0000, /* vector 3, direct page pointer,
initial IZ (Direct Page Pointer) */
/* BEGIN VECTORS */
/*000A:*/ _dummit, /* vector 5, Bus Error (BERR) */
/*0008:*/ _dummit, /* vector 4, Breakpoint (BKPT) */
/*000C:*/ (@port void *)0x02FA, /* vector 6, Software Interrupt (SWI) to call MCX16 services */
/*000E:*/ _default, /* vector 7, Illegal Instruction */
/*0010:*/ _default, /* vector 8, Divide by Zero */
/*0012:*/ _dummit, /* vector 9, Unassigned, Reserved */
/*0014:*/ _dummit, /* vector A, Unassigned, Reserved */
/*0016:*/ _dummit, /* vector B, Unassigned, , Reserved */
/*0018:*/ _dummit, /* vector C, Unassigned, Reserved */
/*001A:*/ _dummit, /* vector D, Unassigned, Reserved */
/*001C:*/ _dummit, /* vector E, Unassigned, Reserved */
/*001E:*/ _dummit, /* vector F, Uninitialized Interrupt */
/*0020:*/ _dummit, /* vector 10, Unassigned, Reserved */
/*0022:*/ _dummit, /* vector 11, Level 1 Interrupt Autovector */
/*0024:*/ _dummit, /* Vector 12, Level 2 Interrupt Autovector */
/*0026:*/ _dummit, /* Vector 13, Level 3 Interrupt Autovector */
/*0028:*/ _dummit, /* Vector 14, Level 4 Interrupt Autovector */
/*002A:*/ _dummit, /* Vector 15, Level 5 Interrupt Autovector */
/*002C:*/ _dummit, /* Vector 16, Level 6 Interrupt Autovector */
/*002E:*/ _dummit, /* Vector 17, Level 7 Interrupt Autovector */
/*0030:*/ _dummit, /* Vector 18, Spurious Interrupt */
/*0032:*/ _dummit, /* vector 19 user-defined interrupt */
/*0034:*/ _dummit, /* vector 1A user-defined interrupt */
/*0036:*/ _dummit, /* vector 1B user-defined interrupt */
/*0038:*/ _dummit, /* vector 1C user-defined interrupt */
/*003A:*/ _dummit, /* vector 1E user-defined interrupt */
/*003C:*/ _dummit, /* vector 1E user-defined interrupt */
/*003E:*/ _dummit, /* vector 1F user-defined interrupt */
/*0040:*/ _dummit, /* vector 20 user-defined interrupt */
/*0042:*/ _dummit, /* vector 21 user-defined interrupt */
/*0044:*/ _dummit, /* vector 22 user-defined interrupt */
/*0046:*/ _dummit, /* vector 23 user-defined interrupt */
/*0048:*/ _dummit, /* vector 24 user-defined interrupt */
/*004A:*/ _dummit, /* vector 25 user-defined interrupt */
/*004C:*/ _dummit, /* vector 26 user-defined interrupt */
/*004E:*/ _dummit, /* vector 27 user-defined interrupt */
/*0050:*/ _dummit, /* vector 28 user-defined interrupt */
/*0052:*/ _dummit, /* vector 29 user-defined interrupt */
/*0054:*/ _dummit, /* vector 2A user-defined interrupt */
/*0056:*/ _dummit, /* vector 2B user-defined interrupt */
/*0058:*/ _dummit, /* vector 2C user-defined interrupt */
/*005A:*/ _dummit, /* vector 2D user-defined interrupt */
/*005C:*/ _dummit, /* vector 2E user-defined interrupt */
/*005E:*/ _dummit, /* vector 2F user-defined interrupt */
/*0060:*/ _dummit, /* vector 30 user-defined interrupt */
/*0062:*/ _dummit, /* vector 31 user-defined interrupt */
/*0064:*/ _dummit, /* vector 32 user-defined interrupt */
/*0066:*/ _dummit, /* vector 33 user-defined interrupt */
/*0068:*/ _dummit, /* vector 34 user-defined interrupt */
/*006A:*/ _dummit, /* vector 35 user-defined interrupt */
/*006C:*/ _dummit, /* vector 36 user-defined interrupt */
/*006E:*/ _dummit, /* vector 37 user-defined interrupt */
/*0070:*/ (@port void *)&SysTable, /* vector 38 points to SysTable address */
/*0072:*/ (@port void *)0x81E, /* vector 39 as a null task */
/*0074:*/ SCIIsr, /* Vector 3A, Interrupt Service Routine SCI */
};
/* empty function to receive an undefined interrupt
*/
static @port void _dummit(void) /* just contains rti */
{
/* enter background debug mode */
_asm("BGND\n");
_asm("nop\n");
}
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