CISC Architecture will die?

As we know, Intel's x86 architecure is based on an old technology called CISC (Complete Instruction Set Computer). The newer technology of microprocessors is based on RISC (Reduced Instruction Set Computer). The difference is that CISC uses a complete set of instructions and many of them with different length, thus pipelining, pre-fetching and other new schemes to improve parallelism hard to achieve. Meanwhile, in RISC all instructions are in the same length. Another thing is that RISC is based on architecture that is called "register-register" or Load-Store, which does not have accumulator, but all of the registers are General Purpose Registers (GPR).

Optimizations achieved by RISCs are done through compiler assistance. Thus, in the desktop/server market, RISC computers use compilers to translate high-level codes into RISC instructions and the remaining CISC computer uses hardware to translate microcodes. One recent novel variation for the laptop market is the Transmeta Crusoe, which interprets 80x86 instructions and compiles on the fly into internal instructions. The similar way is done on recent Intel Pentium4 architecture with its NetBurst, superscalar etc.

The oldest architecture in computer engineering is stack architecture. In 196, a company called Burroughs delivered the B5000 which is based on stack architecture. Stack architecture is almost obsolete, until Java Virtual Machine came from Sun. Some processors also still use this stack architecture. For example, floating point processing on x86 processors or some embedded microcontrollers.

In the early 1980s, the direction of computer architecture began to swing away from providing high-level hardware support for languages. Ditzel and Patterson analyzed the difficulties encountered by the high-level language archictectures and argued that the answer lay in simpler architectures. In another paper, these authors first discussed the idea of RISC and presented the argument for simpler architecture. Two VAX architects, Clark adn Strecker, rebutted their proposal.

In 1980, Patterson and his colleagues at Berkeley began the project that was to give this architectural approach its name. They built two computers called RISC-I and RISC-II. Because the IBM project on RISC was not widely known or discussed, the role played by the Berkeley group in promoting the RISC approach was critical to the acceptance of the technology. They also built one of the first instruction caches to support hybrid format RISC. It supported 16 and 32-bit instructions in memory but 32-bit in the cache. The Berkeley group went on to build RISC computer targeted toward Smalltalk, and LISP.

In 1981, Hennessy and his colleagues at Stanford University published a description of the Stanford MIPS computer. Efficient pipelining and compiler-assisted scheduling of the pipeline were both important aspects of the original MIPS design. MIPS stood for "Microprocessor without Interlocked Pipeline Stages", reflecting the lack of hardware to stall the pipeline, as the compiler would handle dependencies.

In 1987, a new company named Sun Microsystems started selling computers based on the SPARC architecture. SPARC is a derivative of the Berkeley RISC-II processor. In 1990s, Apple, IBM, and Motorola co-developed a new RISC processor called PowerPC. The processor is now used in every computer made by Apple. The latest PowerPC is G5 which is dual-core RISC processor. As we see, Apple's Mac computers are basically speedier than Intel's x86 architecture, but because Intel is strong in its marketing and always talks about "GigaHertz" clock performance, many people still think that higher clock speed on processors always corresponds to faster processing, which is not always the case. All graphic card producers such as NVidia and ATI also base their graphic coprocessors on RISC architecture, even with more advanced technologies (just for your info, NVidia's GeForce6 GPUs have more transistors than the latest Pentium4 Extreme Edition).

Why then the old technology (CISC in x86) still can survive? The answer is machine-level compatibility. With millions of x86 installed in most PCs worldwide, Intel ofcourse wants to keep it that way. Their RISC project cooperate along with HP (I64 architecture [one of the product is named Itanium], which is based on RISC) could not repeat their success in x86. But, although x86s use CISC from code perspective, they actually are more RISC and CISC as the processors now borrow technologies from RISC, such as pipelining, pre-fetch, super-scalar, branch prediction and parallelism (which is popularized by Intel with terminology: SIMD, such as in MMX, SSE, SSE2 and SSE3 codes).